2nd June 2008, 07:11 pm
Three-dimensional (3D) packaging is expected to emerge as a dominant performing solution in the electronic/chip packaging industry, says a new study from Frost & Sullivan. The analysis, “Global Trends in Electronic/Chip Packaging,” finds that 3D packaging technology will be key in catering to the ever-increasing miniaturization demands from application sectors that include consumer electronics and a wide range of high-speed memory devices.
Looking beyond successful solutions such as system on chip (SoC), the electronic/chip packaging industry has steadily started exploring various forms of system in package (SiP)-based solutions.

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17th May 2008, 02:39 am
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22nd March 2008, 01:42 pm

How often have you thought to yourself “I wish I had an ice cube maker?” I’m going to guess that most of you won’t have ever had that thought. It’s understandable, since practically everyone owns a freezer, which makes ice cubes. However, if you need a lot of ice in a short while, you’ll be disappointed. This is why the Ice Cube Maker Machine was created.
This simple device can freeze up a dozen cubes of ice in just 10 minutes. When you’re serving a lot of guests at a large gathering, a steady supply of ice is always needed. It accomplishes this feat by utilizing a highly efficient compressor which can freeze at much faster rates than a regular freezer. You’ll also be happy to note that it is a low-noise machine, so your guests won’t be bothered by any loud humming noises.
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19th January 2008, 04:37 am
Bionic Bugs:
In July, however, a Harvard University team got a truly fly-like robot airborne, its synthetic wings buzzing at 120 beats per second.
“It showed that we can manufacture the articulated, high-speed structures that you need to re-create the complex wing motions that insects produce,” said team leader Robert Wood.
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11th January 2008, 02:11 pm
Gaithersburg, MD — Scientists at the National Institute of Standards and Technology (NIST) have made the first direct measurements of the infinitesimal expansion and collapse of thin polymer films used in the manufacture of advanced semiconductor devices. It’s a matter of only a couple of nanometers, but it can be enough to affect the performance of next-generation chip manufacturing. The NIST measurements, detailed in a new paper,* offer a new insight into the complex chemistry that enables the mass production of powerful new integrated circuits. The smallest critical features in memory or processor chips include transistor “gates.” In today’s most advanced chips, gate length is about 45 nanometers, and the industry is aiming for 32-nanometer gates. To build the nearly one billion transistors in modern microprocessors, manufacturers use photolithography, the high-tech, nanoscale version of printing technology. The semiconductor wafer is coated with a thin film of photoresist, a polymer-based formulation, and exposed with a desired pattern using masks and short wavelength light (193 nm). The light changes the solubility of the exposed portions of the resist, and a developer fluid is used to wash the resist away, leaving the pattern which is used for further processing.
Exactly what happens at the interface between the exposed and unexposed photoresist has become an important issue for the design of 32-nanometer processes. Most of the exposed areas of the photoresist swell slightly and dissolve away when washed with the developer. However this swelling can induce the polymer formulation to separate (like oil and water) and alter the unexposed portions of the resist at the edges of the pattern, roughening the edge. For a 32-nanometer feature, manufacturers want to hold this roughness to at most about two or three nanometers.
Industry models of the process have assumed a fairly simple relationship in which edge roughness in the exposed “latent” image in the photoresist transfers directly to the developed pattern, but the NIST measurements reveal a much more complicated process. By substituting deuterium-based heavy water in the chemistry, the NIST team was able to use neutrons to observe the entire process at a nanometer scale. They found that at the edges of exposed areas the photoresist components interact to allow the developer to penetrate several nanometers into the unexposed resist. This interface region swells up and remains swollen during the rinsing process, collapsing when the surface is dried. The magnitude of the swelling is significantly larger than the molecules in the resist, and the end effect can limit the ability of the photoresist to achieve the needed edge resolution. On the plus side, say the researchers, their measurements give new insight into how the resist chemistry could be modified to control the swelling to optimal levels.
Continue reading ‘Nanoscale Details Of Photolithography Process In Semiconductor Manufacturing Revealed’ »