2nd June 2008, 07:11 pm
Three-dimensional (3D) packaging is expected to emerge as a dominant performing solution in the electronic/chip packaging industry, says a new study from Frost & Sullivan. The analysis, “Global Trends in Electronic/Chip Packaging,” finds that 3D packaging technology will be key in catering to the ever-increasing miniaturization demands from application sectors that include consumer electronics and a wide range of high-speed memory devices.
Looking beyond successful solutions such as system on chip (SoC), the electronic/chip packaging industry has steadily started exploring various forms of system in package (SiP)-based solutions.
Continue reading ‘3D packaging technologies evolve in response to miniaturization’ »
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16th May 2008, 04:10 pm
Normally fragile and brittle silicon chips have been made to bend and fold, paving the way for a new generation of flexible electronic devices. The stretchy circuits could be used to build advanced brain implants, health monitors or smart clothing.
The complex devices consist of concertina-like folds of ultra-thin silicon bonded to sheets of rubber.
Writing in the journal Science, the US researchers say the chip’s performance is similar to conventional electronics. Continue reading ‘Silicon chips stretch into shape’ »
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